Features
Utilizes the AVR ? RISC Architecture
AVR High-performance and Low-power RISC Architecture
118 Powerful Instructions Most Single Clock Cycle Execution
32 x 8 General-purpose Working Registers
Up to 8 MIPS Throughput at 8 MHz
Data and Nonvolatile Program Memory
8K Bytes of In-System Programmable Flash
Endurance: 1,000 Write/Erase Cycles
512 Bytes of SRAM
512 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
Programming Lock for Flash Program and EEPROM Data Security
In stock and ready to ship. Parts new and original
Place of Origin:Guangdong China (Mainland) Smart Card Reader ICs Devices full products for ATMEL, Top 3 Pricing Throughout Asia, Cost-effective Offer save your cash ...