Network Soc Chip

NCplus is SoC chip (ARM720T core + Digital Camera Processor + Motion JPEG + Ethernet Controller (MAC))ARM720T coreARM720T contains the ARM7TDMI CPU core, 8KB unified cache, MMU, and Write buffer. It supports the 16-bit Thumb instruction, and has the effective characteristic for low power consumption. It is suitable for a platform operating system such as Linux, or a real time OS.Digital Camera ProcessorThe Digital Camera Processor (DCP) is a digital signal processor for color CCD. DCP processes digitized sensor signal, which is through CDS (Correlated Double Sampling), AGC and A/D converter for analog signal from CCD sensor. DCP includes color matrix, V/H edge enhancer, gamma correction, AE (Auto Exposure), and AWB (Auto White Balance). And, it generates timing signal for controlling CCD sensor, CDS, AGC, and ADC. Also it transfers CCIR656 format to Motion JPEG for digital.Motion JPEGThe MJPEG (Motion-JPEG) is fully compatible with baseline JPEG standard ISO/IEC 10918_1/2. The MJPEG encodes an image from the DCP module or the external video channels, scales the image, processes 8x8 blocks of input pixel data, and stores the compressed image to the external memory through the FIFO. It also supports CCIR656 standard interface and 4:2:2 or 4:2:0 video formats.Ethernet Controller (MAC)The Fast Ethernet MAC Core provides the IEEE802.3 (1998 Edition) compliant Media Access Controller for the 10Mbps Ethernet operation. The MAC transmits or receives the IEEE802.3 compliant Ethernet frames when connected to a physical layer (PHY) LSI (or with a built-in macro). It operates at full-duplex or half-duplex. The MAC implements the Carrier Sense Multiple Access/Collision Detection (CSMA/CD) at half-duplex, and the MAC and flow control by pause frame at full-duplex. It fully supports MII (Media Independent Interface), which allows easy access to the MII Management Registers within the PHY device.