MVDP-100 is a highly integrated single chip implementation for deinterlacing, format conversion, graphics processing and various display functions. MVDP-100 provides two input ports for both progressive and interlaced scan video, one digital output port for progressive scan type of digital video stream and one analog video output. MVDP-100 receives digital video stream and converts it into progressive scan video with motion adaptive 3-D deinterlacing algorithm when the input source is interlaced video. MVDP-100 scales up or down the input video with an arbitrary scale ratio. MVDP-100 also provides PIP (Picture-In-Picture), POP (Picture-Out of-Picture), double-window, pan-and-scan, and high quality graphics capabilities. MVDP-100's dual input, high performance video processing and high resolution output capability is suitable for high quality display format conversion applications such as FPD (Flat Panel Display) monitors for both TV and PC video display, the equipments for studio quality image processing capability, display multiplexing systems for handling multiple video streams, and so on. Dual independent RGB and YCbCr input ports Supports both interlaced and progressive digital inputs with an arbitrary video format up to 1920 x 1080i and 1280 x 1024P Generates progressive format of digital and analog video output up to 1920 x 1080P High quality motion compensated 3D deinterlacing with film mode and fast motion support Horizontal & vertical anti-aliasing filters for down conversion Advanced signal enhancement algorithm for crisper picture quality Powerful display functions including PIP, POP, double-window, Zoom, and OSD Seamless interface to 8MB or 16MB SDRAM widely available in the market Host processor interface with DMA capability Input Format - Dual input ports : 24-bit port and 16-bit digital video input port - Video Source : 24-bit RGB, 24-bit YCbCr 4:4:4, 16-bit YCbCr 4:2:2 , 8/16-bit digital format - Maximum Pixel Rate : 108Mpixel/sec- Interlaced Input : standard or non-standard video format up to 1920 x 1080i- Progressive Input : standard or non-standard video format up to 1280 x 1024P Output Format - Progressive digital RGB or YCbCr with 10-bit for each color component - Programmable output mode : 30-bit single width or 60-bit double width output - Maximum Pixel Rate : 150Mpixel/sec- Programmable display format with standard or non-standard video format up to 1920 x 1080P- Progressive analog RGB or YPbPr Format Conversion - Independent two scalers for both Main and PIP display - Independent horizontal and vertical scaling- Format conversion from one format to another format at an arbitrary scaling ratio - Horizontal and vertical anti-aliasing filters for graceful down conversion - Scaling for Main display : x1/15 ~ unlimited - Scaling for PIP display : unlimited ~ Max.960 x540 Frame Rate Conversion - Frame rate conversion from 3 ~ 250Hz to 3 ~ 250Hz- Conversion Ratio : x1/31 ~ x31 - Uses external frame buffer Deinterlacing - Deinterlacing for any interlaced input video up to 1080i - Motion adaptive 3-D deinterlacing using 3 fields on a per-pixel basis- Programmable motion detection and compensation control- Adaptive motion weighted interpolation for eliminating non-motion artifacts- Regionally adaptive motion detection with motion history- Multi-directional edge preserving deinterlacing- Film mode support - Fast motion support Display Functions - Programmable size & position zoom in/out- Programmable size & position PIP, POP- Programmable position double-window- Signal enhancement with 2D non-linear filter- YCbCr-to-RGB color space conversion for display output- Hue, contrast and brightness control by 10-bit LUT (Look-Up Table) High Quality Graphics - 6 graphic layers with full screen overlay capability - 2/4/8-bit palette mode and 16/24-bit true color mode - 64 level alpha blending - Animation effects with hierarchical linked-list architecture Frame Buffer Memory - 8MB or 16MB external SDRAM- 32-bit or 64-bit data width interface- Also used for graphics bitmap storage - Seamless interface to widely available x16 or x32-bit SDRAM Host Interface - 32-bit or 16-bit data bus- Glueless interface to Motorola processors- DMA slave capability for fast download of graphics bitmap data Miscellaneous - Auto detection of input video/sync- Input sync lock mode or free-run mode operation- Programmable output sync generation- Built-in test pattern generation logic Miscellaneous - Auto detection of input video/sync- Input sync lock mode or free-run mode operation - Programmable output sync generation- Built-in test pattern generation logic Electrical and Mechanical Characteristics - 3.3V supply voltage, 5V tolerant I/O- 352-pin SBGA package FPD (Flat Panel Display) monitor High-end HDTV set or professional set-top-box Systems for handling simultaneously TV and PC video signals Equipments requiring studio quality image processing capability Display multiplexer for handling multiple video streams Main station of digital home theater system
MVDP-100 is a highly integrated single chip implementation for deinterlacing |
MDIN-150 is a highly integrated single chip implementation of deinterlacing and format conversion for processing HDTV signal as well as existing analog TV signal. MDIN-150 provides two digital input ports and one digital output port, and it handles both progressive and ...
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