Dot matrix LCD segment driver with 64 channel output Input: 8bit parallel display data control signal from MPU divided bias voltage (V0R, V0L, V2R, V2L, V3R, V3L, V5R, V5L) Output: 64 channels for LCD driving. Display data is stored in display data RAM from MPU. Interface RAM Capacity: 512 bytes (4096 bits) Applicable LCD duty:1/32-1/64 LCD driving voltage: 8V-17V(VDD-VEE) Power supply voltage:+2.7~+5.5V High voltage CMOS process. 100PQ, 100PQFP or bare chip available